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[SCMMC145152

Description: 1、数字锁相环的单片机代码。 2、单片机与数字锁相环MC145152的应用系统的设计与实现。-1, the single-chip digital phase-locked loop code. 2, microcontroller and digital PLL MC145152 Application System Design and Implementation.
Platform: | Size: 11264 | Author: foxmail2008 | Hits:

[Communication-MobilefrequencySynthesis

Description: 频率合成器环路滤波器的设计,介绍由集成锁相芯片PE3236 和集成锁相芯片ADF4107 组成的单环锁相环常用的环路滤波器。-Frequency synthesizer loop filter design, introduced by the integrated phase-locked-chip phase-locked PE3236 and an integrated single-chip component Central ADF4107 PLL loop filter commonly used.
Platform: | Size: 224256 | Author: 吴华明 | Hits:

[Software EngineeringCOSTAS

Description: 根据韦瓦[ Weawa] 单边带调制解调法、COSTAS 锁相环及双线性变换, 提出基于软件无线电的单边带锁相解调器。解调器运行在TMS320C6203 上, 能实时处理160kHz 信号, 捕捉8kHz 频偏。-According to韦瓦[Weawa] SSB modulation and demodulation method, COSTAS PLL and the bilinear transform, based on software radio single sideband phase-locked demodulator. Demodulator running at TMS320C6203, the 160kHz signal to deal with real-time, capture 8kHz offset.
Platform: | Size: 338944 | Author: 李松 | Hits:

[Embeded-SCM DevelopPLL

Description: PPL讲义,关于鉴相器方面的技术资料,对于用单片机编程有好处。-PPL notes, phase detector on the technical information, good use of single-chip programming.
Platform: | Size: 171008 | Author: 肖伟 | Hits:

[matlabPhaseLockedLoop

Description: This tutorial starts with a simple conceptual model of an analog Phase-Locked Loop (PLL). Through elaboration it ends at a model of an all digital and fixed-point phase-locked loop. The final model can serve a starting point for code generation (both ANSI C or synthesizable HDL). The step-wise elaboration of the model illustrates how Simulink® forms the basis a model-based design where continuous verification of the model reduces errors. -This tutorial starts with a simple conceptual model of an analog Phase-Locked Loop (PLL). Through elaboration it ends at a model of an all digital and fixed-point phase-locked loop. The final model can serve a starting point for code generation (both ANSI C or synthesizable HDL). The step-wise elaboration of the model illustrates how Simulink® forms the basis a model-based design where continuous verification of the model reduces errors.
Platform: | Size: 399360 | Author: 张骅 | Hits:

[SCMshuanglushuzihecheng

Description: 摘要 电能表作为用电量的测量工具广泛的应用于各种场合。在电能表校表系统中,需要的最基本的输入信号源是高精度双路正弦信号源,并要求可对其频率、相位、幅值进行调节,来对电能表进行校准。 基于单片机的程控信号源设计,运用数字调相、数字调幅和数字调频等技术,要求实现相位、幅度、频率的高精度程控调节。本文设计了一种利用锁相环频率合成技术和数字波形合成技术组成的程控低频正弦波信号发生器,并给出了调幅、调频、调相的实用电路,频率调节通过改变8253计数器的分频系数来实现;相位调节由51单片机预置计数器的计数初值来完成,幅度的调整通过改变DAC1210II的参考电压来实现,使频率分辨率达0.01Hz,相位调节精度达0.1°,并介绍电路中的主要芯的功能及使用。输出正弦波频率和幅值的精度高,稳定性好,失真度低,电路简单、可靠、便于程控。 关键词:数字合成信号源;程控;调幅;调频;移相; -Abstract Meter consumption as the size of the measurement tool is widely used in various occasions. In single-phase power meter verify system, the most basic needs of the input signal is the source of two-way high-precision sine signal source, and may request its frequency, phase, amplitude in a certain step to adjust to the imitate of the actual electricity load with a right meter calibration. Design of the programmable signal supply controlled source,which based on the MCU,including digital phase adjustment,distal amplitude adjustment,digital frequency adjustment etc.The system should achieve high quality digital adjustment of phase, amplitude and frequency. This paper describes the use of a PLL frequency synthesizer technology, and digital wave form synthesis technology consisting of program-controlled low-frequency sine wave signal issued devices, and applies the amplitude, frequency, phase of practical circuit. Frequency can be adjusted through a change in the 8253 counter-frequ
Platform: | Size: 381952 | Author: 张谦 | Hits:

[GPS developDesignoftrackingloopofGPSsoftwarereceiver

Description: 本文在分析GPS 软件接收机跟踪原理的基础上,首先比较码环与载波环不同鉴相器的性能,然后对二阶锁相环中不同环路参数设下的跟踪效果进行仿真分析,最后设计 了合适的码环与载波环路,并用实际采集的GPS 数据论证了所设计环路的有效性,为GPS 软件接收机跟踪环路的设计提供了参考。-Based on the analysis of GPS receiver tracking software on the basis of the principle, first compare the different code loop and carrier loop phase detector performance, and the different second-order PLL loop parameters set by the tracking simulation analysis, the final design the appropriate code loop and carrier loop, and with real GPS data collected demonstrated the validity of the design loop for GPS receiver tracking loop design software provides a reference.
Platform: | Size: 634880 | Author: herui | Hits:

[DSP programPV-inverter-(mppt-pll-pid)

Description: 基于DSP的单相光伏并网逆变器全部源代码,包括锁相环PLL,mppt,pid控制程序,希望对大家有帮助!-DSP single-phase photovoltaic grid-connected inverter with full source code, including the phase-locked loop PLL, mppt, pid control procedures, we hope to help!
Platform: | Size: 5120 | Author: hahalee | Hits:

[SCM2012.4.26-SD5duoji-pinlvceshi

Description: 2012.4.26-SD5舵机频率测试,飞思卡尔 智能车比赛 舵机测试频率 源程序,包含了对飞思卡尔s12xs128单片机相应模块的初始化设置,如锁相环PLL,pwm,PIT,以及PID参数的整定。-2012.4.26-SD5 Servo Frequency Test, Freescale Smart Car Competition steering gear test frequency source that contains initialization settings on the Freescale s12xs128 corresponding single-chip module, such as phase-locked loop PLL, pwm, the PIT and PID parameter tuning.
Platform: | Size: 2048 | Author: ai | Hits:

[matlabpll

Description: 单载波 BPSK QPSK调制下的PLL功能实现 实现频率相位的跟踪-Single carrier BPSK QPSK modulation the PLL frequency phase tracking
Platform: | Size: 1024 | Author: | Hits:

[Communication-Mobilepll_carrier_syn

Description: 本程序是锁相环的仿真程序,具有接收端载波同步的功能。注释详尽,程序规范。发端的调制方式有单载波调制,BPSK调制,QPSK调制可供选择。程序中有星座图,锁相环的频差、相差图,以及解调后的基带波形。-This program is a phase-locked loop simulation program, the with carrier synchronization receiving end function. Notes detailed program specifications. The originator of the modulation scheme to choose a single carrier modulation, BPSK modulation, QPSK modulation. Program constellation diagram, the PLL frequency difference, a difference of FIG, and the demodulated baseband waveform.
Platform: | Size: 4096 | Author: liuwei | Hits:

[DSP programinventer_8_26

Description: 该程序是我硕士毕业论文《单相并网逆变器》源程序,调试成功的。(直流直接逆变为交流的单相全桥逆变拓扑,有离网并网功能,锁相环过零检测再采用PI.)-This program is my master' s thesis, " single-phase grid-connected inverters," the source, debugging success. (DC-AC inverter direct single-phase full-bridge inverter topology, there are off-grid and network functions, PLL zero crossing detection and then using PI.)
Platform: | Size: 683008 | Author: 王元浩 | Hits:

[matlabPLL_ceshi

Description: 单相信号的锁相功能实现(PLL),自动跟踪单相电网信号。-Single-phase signalof thelock-infunctions to achieve(PLL),automatic trackingof single-phasepowersignals.
Platform: | Size: 11264 | Author: 蒋晨 | Hits:

[matlabSPLL

Description: 较为详细地介绍了单同步坐标系软件锁相环,采用了单一的同步坐标系锁相控制结构,一般适用于电网电压平衡时的相位,频率及幅值的检测,以及用于多种控制结构中(下垂控制,PQ控制,双闭环控制)。-A more detailed description of the principle of a single coordinate system PLL synchronization and setting PI controller parameters. SPLL with a single synchronous coordinate system lock control structure, generally applicable to the detection phase, frequency and amplitude of the grid voltage at equilibrium, as well as for a variety of control structures (droop control, PQ control, dual loop control).
Platform: | Size: 183296 | Author: 康康 | Hits:

[Software Engineeringpll

Description: Phase Locked Loops (PLL) Introduction to PLL The concept of Phase Locked Loops (PLL) first emerged in the early 1930’s.But the technology was not developed as it now, the cost factor for developing this technology was very high. Since the advancement in the field of integrated circuits, PLL has become one of the main building blocks in the electronics technology. In present, the PLL is available as a single IC in the SE/NE560 series (560, 561, 562, 564, 565 and 567) to further reduce the buying cost ,the discrete IC’s are used to construct a PLL. PLL Applications Frequency Modulation (FM) stereo decoders, FM Demodulation networks for FM operation. Frequency synthesis that provides multiple of a reference signal frequency. Used in motorspeed controls, tracking filters. Used in frequency shift keying (FSK) decodes for demodulation carrier frequencies.
Platform: | Size: 13312 | Author: sabir ouchen | Hits:

[Otherfinalmay10.slx

Description: A PLL-Less Scheme for Single-Phase Grid Interfaced Load Compensating Solar PV Generation System
Platform: | Size: 47104 | Author: ganeshan | Hits:

[OtherSinglePhaseLockLoop

Description: single phase voltage PLL,simulink simulation model
Platform: | Size: 8192 | Author: bruce chen | Hits:

[Embeded-SCM Developpll

Description: 基于PSIM的锁相环。可以放在任何PSIM的模型,例如三相并网和单相的也可以的-Phase Locked Loop Based on. Can be placed in any PSIM model, such as three-phase and single phase can also be
Platform: | Size: 5120 | Author: 王八 | Hits:

[SCMPLL_D

Description: 用51单片机控制锁相环PLL输出不同频率的正弦信号(The phase-locked loop PLL is controlled by 51 single-chip microcomputer to output sinusoidal signals of different frequencies)
Platform: | Size: 105472 | Author: 宝宝嘘嘘 | Hits:

[DSP programMINI_INV_v1

Description: 自己毕设用的单相并网逆变器程序,使用的是TI公司的DSP28335,包括了锁相环PLL,PR控制等子程序(The program of single-phase grid-connected inverters is designed by ourselves. It uses TI's DSP28335, including PLL, PR control and other subroutines.)
Platform: | Size: 1467392 | Author: fdwqfwrg | Hits:
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